AMCC PPC405 Specifikace Strana 1

Part Number PPC405EPRevision 1.08 – March 24, 2008AMCC 1PPC405EPPowerPC 405EP Embedded ProcessorData SheetFeatures• AMCC PowerPC® 405 32-bit RISC pro

PPC405EP – PowerPC 405EP Embedded Processor10 AMCCRevision 1.08 – March 24, 2008Data SheetSerial Interface• One 8-pin UART and one 2-pin (Tx and Rx o

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 11Data Sheet10/100 Mbps Ethernet MAC• Two ports capable of handling ful

PPC405EP – PowerPC 405EP Embedded Processor12 AMCCRevision 1.08 – March 24, 2008Data SheetFigure 2. 31mm, 385-Ball E-PBGA PackageAs1.27 TYP0.65 ± 0.0

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 13Data SheetPin ListsThe following table lists all the external signals

PPC405EP – PowerPC 405EP Embedded Processor14 AMCCRevision 1.08 – March 24, 2008Data SheetGND A01Ground Note: K10-K14, L10-L14, M10-M14, N10-N14, and

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 15Data SheetGND M01PowerNote: K10-K14, L10-L14, M10-M14, N10-N14, and P

PPC405EP – PowerPC 405EP Embedded Processor16 AMCCRevision 1.08 – March 24, 2008Data SheetGPIO00[PerBLast]A09System 35GPIO01[TS1E] AA23GPIO02[TS2E]

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 17Data SheetMemAddr00 AB15SDRAMNote: During a CAS cycle MemAddr00 is th

PPC405EP – PowerPC 405EP Embedded Processor18 AMCCRevision 1.08 – March 24, 2008Data SheetOVDDB11Power 36OVDDB09OVDDB19OVDDC17OVDDD13OVDDE06OVDDE07OV

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 19Data SheetPCIAD00 B16PCINote: PCIAD31 is the most significant bit (ms

PPC405EP – PowerPC 405EP Embedded Processor2 AMCCRevision 1.08 – March 24, 2008Data SheetTable of ContentsFeatures . . . . . . . . . . . . . . . . .

PPC405EP – PowerPC 405EP Embedded Processor20 AMCCRevision 1.08 – March 24, 2008Data SheetPCIReq0/Gnt E20PCI 31PCIReq1F20PCIReq2E22PCIResetG20 PCI

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 21Data SheetPerData00 P02External Slave PeripheralNote: PerData00 is th

PPC405EP – PowerPC 405EP Embedded Processor22 AMCCRevision 1.08 – March 24, 2008Data SheetSysReset AB20 System 35TCK Y02 JTAG 34TDI AA1 JTAG 34TDO

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 23Data SheetTable 4. Signals Listed by Ball Assignment (Sheet 1 of 6)Ba

PPC405EP – PowerPC 405EP Embedded Processor24 AMCCRevision 1.08 – March 24, 2008Data Sheet E01 PerWBE1 F01 PerData14 G01 GND H01 PerData09 E02 PHY

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 25Data Sheet J01 GPIO27[UART0_DTR] K01 GPIO25[UART0_DSR] L01 EMC0Tx0D

PPC405EP – PowerPC 405EP Embedded Processor26 AMCCRevision 1.08 – March 24, 2008Data Sheet N01OVDD P01 PerData02 R01 PHY0Rx1D0 T01 UART0_Rx N02 UAR

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 27Data Sheet U01 GND V01OVDD W01 EMC0Tx0En Y01 IICSDA U02 DQM3 V02 M

PPC405EP – PowerPC 405EP Embedded Processor28 AMCCRevision 1.08 – March 24, 2008Data Sheet AA01 TDI AB01 GND AC01 GND AA02 TDO AB02 GND AC02 GN

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 29Data SheetSignal ListThe following table provides a summary of the nu

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 3Data SheetList of FiguresPPC405EP Embedded Controller Functional Block

PPC405EP – PowerPC 405EP Embedded Processor30 AMCCRevision 1.08 – March 24, 2008Data SheetUnused I/OsStrapping of some pins may be necessary when the

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 31Data SheetTable 6. Signal Functional Description (Sheet 1 of 6)Second

PPC405EP – PowerPC 405EP Embedded Processor32 AMCCRevision 1.08 – March 24, 2008Data SheetPCIReq1:2 PCIReq input when internal arbiter is used. I5V t

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 33Data SheetSDRAM InterfaceMemData00:31Memory data bus.Notes:1. MemData

PPC405EP – PowerPC 405EP Embedded Processor34 AMCCRevision 1.08 – March 24, 2008Data SheetPerReady Ready to transfer data. I5V tolerant 3.3V LVTTL1[P

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 35Data SheetTDO Test data out. O5V tolerant 3.3V LVTTLTCK JTAG test cl

PPC405EP – PowerPC 405EP Embedded Processor36 AMCCRevision 1.08 – March 24, 2008Data Sheet PowerGNDGroundNote: K10-K14, L10-L14, M10-M14, N10-N14, an

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 37Data SheetNote:1. For a chip mounted on a JEDEC 2S2P card without a h

PPC405EP – PowerPC 405EP Embedded Processor38 AMCCRevision 1.08 – March 24, 2008Data SheetInput Leakage Current(no pull-up or pull-down)IIL100μAInput

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 39Data SheetFigure 3. 5V-Tolerant Input Current Table 10. Input Capa

PPC405EP – PowerPC 405EP Embedded Processor4 AMCCRevision 1.08 – March 24, 2008Data SheetOrdering, PVR, and JTAG InformationThis section provides the

PPC405EP – PowerPC 405EP Embedded Processor40 AMCCRevision 1.08 – March 24, 2008Data SheetTable 11. DC Electrical CharacteristicsParameter Symbol Min

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 41Data SheetTest ConditionsClock timing and switching characteristics a

PPC405EP – PowerPC 405EP Embedded Processor42 AMCCRevision 1.08 – March 24, 2008Data SheetFigure 4. Clocking WaveformTable 12. Clocking Specification

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 43Data SheetSpread Spectrum ClockingCare must be taken when using a spr

PPC405EP – PowerPC 405EP Embedded Processor44 AMCCRevision 1.08 – March 24, 2008Data SheetTable 13. Peripheral Interface Clock TimingsParameter Min M

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 45Data SheetFigure 5. Input Setup and Hold Timing WaveformFigure 6. Out

PPC405EP – PowerPC 405EP Embedded Processor46 AMCCRevision 1.08 – March 24, 2008Data Sheet Table 14. I/O Specifications—Group 1 (Sheet 1 of 2)Notes

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 47Data SheetInternal Peripheral InterfaceIICSCL na na na na 15.3 10.2II

PPC405EP – PowerPC 405EP Embedded Processor48 AMCCRevision 1.08 – March 24, 2008Data SheetTable 15. I/O Specifications—Group 2Notes:1. The SDRAM comm

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 49Data SheetInitializationThe following describes the method by which i

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 5Data SheetFigure 1. PPC405EP Embedded Controller Functional Block Diag

PPC405EP – PowerPC 405EP Embedded Processor50 AMCCRevision 1.08 – March 24, 2008Data SheetDocument Revision HistoryRevision Date Description1.01 07/3

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 51Data SheetApplied Micro Circuits Corporation215 Moffett Park Drive, S

PPC405EP – PowerPC 405EP Embedded Processor6 AMCCRevision 1.08 – March 24, 2008Data SheetAddress MapsThe PPC405EP incorporates two address maps. The

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 7Data SheetTable 2. DCR Address MapFunction Start Address End Address S

PPC405EP – PowerPC 405EP Embedded Processor8 AMCCRevision 1.08 – March 24, 2008Data SheetOn-Chip Memory (OCM)The OCM feature comprises a memory contr

PPC405EP – PowerPC 405EP Embedded ProcessorRevision 1.08 – March 24, 2008AMCC 9Data SheetSDRAM Memory ControllerThe PPC405EP Memory Controller core p